Design of High Speed 128 bit Parallel Prefix Adders
نویسنده
چکیده
In this paper, we propose 128-bit Kogge-Stone, Ladner-Fischer, Spanning tree parallel prefix adders and compared with Ripple carry adder. In general N-bit adders like Ripple Carry Adders (slow adders compare to other adders), and Carry Look Ahead adders (area consuming adders) are used in earlier days. But now the most Industries are using parallel prefix adders because of their advantages compare to other adders. Parallel prefix adders are faster and area efficient. Parallel prefix adder is a technique for increasing the speed in DSP processor while performing addition. While when we want to design any 128-bit operating systems and processors we can use these adders in place of regular adders. We simulate and synthesis different types of 128-bit prefix adders using Xilinx ISE 12.3 tool. By using these synthesis results, we noted the performance parameters like number of LUTs and delay. We compare these three adders in terms of LUTs (represents area) and delay values. Keywords− prefix adder, carry operator, Kogge-Stone, Spanning tree, Ladner-Fischer.
منابع مشابه
Speed Comparison Parallel Prefix Adders with RCA and CSA in FPGA
The Adders are the critical elements in most of the digital circuit designs, including digital signal processors (DSP) and microprocessors. Extensive research has gone into the VLSI implementations of Parallel Prefix Adders which are known for their best performance. The performance of Parallel Prefix Adders is directly affected by the constraints in the logic implementations of Parallel Prefix...
متن کاملImplementation of Delay Reduction and Area Minimization in 128 and 144 Bit Parallel Prefix Adders Using Fpgas
Parallel-prefix adders (also known as carrytree adders) are known to have the best performance in VLSI designs compared to that of conventional Ripple Carry Adder (RCA). However, each type of parallel prefix adder has its own pros and cons and are chosen according to the design requirement of the application. This paper investigates mainly two types of carry-tree adders, the brent kungg adder a...
متن کاملDesign of High-Speed Low-Power Parallel-Prefix VLSI Adders
Parallel-prefix adders offer a highly-efficient solution to the binary addition problem. Several parallel-prefix adder topologies have been presented that exhibit various area and delay characteristics. However, no methodology has been reported so far that directly aims to the reduction of switching activity of the carry-computation unit. In this paper by reformulating the carry equations, we i...
متن کاملModified 32-Bit Shift-Add Multiplier Design for Low Power Application
Multiplication is a basic operation in any signal processing application. Multiplication is the most important one among the four arithmetic operations like addition, subtraction, and division. Multipliers are usually hardware intensive, and the main parameters of concern are high speed, low cost, and less VLSI area. The propagation time and power consumption in the multiplier are always high. ...
متن کاملDesign and Synthesis of High Speed Low Power Signed Digit Adders
Signed digit (SD) number systems provide the possibility of constant-time addition, where inter-digit carry propagation is eliminated. Such carry-free addition is primarily a three-step process; adding the equally weighted SDs to form the primary sum digits, decomposing the latter to interim sum digits and transfer digits, which commonly belong to {–1, 0, 1}, and finally adding the tra...
متن کامل